Journal article 1179 views
NEGF simulations of a junctionless Si gate-all-around nanowire transistor with discrete dopants
A Martinez,
M Aldegunde,
A.R Brown,
S Roy,
A Asenov,
Antonio Martinez Muniz 
Solid-State Electronics, Volume: 71, Pages: 101 - 105
Swansea University Author:
Antonio Martinez Muniz
Full text not available from this repository: check for access using links below.
DOI (Published version): 10.1016/j.sse.2011.10.028
Abstract
NEGF simulations of a junctionless Si gate-all-around nanowire transistor with discrete dopants
| Published in: | Solid-State Electronics |
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| ISSN: | 0038-1101 |
| Published: |
2012
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| Online Access: |
Check full text
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| URI: | https://cronfa.swan.ac.uk/Record/cronfa10579 |
| Item Description: |
This paper first appeared at the ULIS (Ireland) conference and was subsequently invited for publication in Solid state electronics journal, as it showed that extremely scaled junctionless transistors with channel lengths smaller than 20 nm and 5x5 nm2 cross section have large variability due to random dopant fluctuations. These junctionless devices appear as an attractive alternative to conventional junction MOSFET transistors in future device miniaturisation. |
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| College: |
Faculty of Science and Engineering |
| Start Page: |
101 |
| End Page: |
105 |