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Multilevel 3-D Device Simulation Approach Applied to Deeply Scaled Nanowire Field Effect Transistors

Natalia Seoane Orcid Logo, Karol Kalna Orcid Logo, Xavier Cartoixa Orcid Logo, Antonio Garcia-Loureiro Orcid Logo

IEEE Transactions on Electron Devices, Volume: 69, Issue: 9, Pages: 5276 - 5282

Swansea University Author: Karol Kalna Orcid Logo

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DOI (Published version): 10.1109/ted.2022.3188945

Abstract

Three silicon nanowire (SiNW) field effect transistors (FETs) with 15 -, 12.5 -and 10.6 -nm gate lengths are simulated using hierarchical multilevel quantum and semiclassical models verified against experimental ID – VG characteristics. The tight-binding (TB) formalism is employed to obtain the band...

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Published in: IEEE Transactions on Electron Devices
ISSN: 0018-9383 1557-9646
Published: Institute of Electrical and Electronics Engineers (IEEE) 2022
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URI: https://cronfa.swan.ac.uk/Record/cronfa60692
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spelling 2022-10-31T20:27:21.9377130 v2 60692 2022-08-01 Multilevel 3-D Device Simulation Approach Applied to Deeply Scaled Nanowire Field Effect Transistors 1329a42020e44fdd13de2f20d5143253 0000-0002-6333-9189 Karol Kalna Karol Kalna true false 2022-08-01 EEEG Three silicon nanowire (SiNW) field effect transistors (FETs) with 15 -, 12.5 -and 10.6 -nm gate lengths are simulated using hierarchical multilevel quantum and semiclassical models verified against experimental ID – VG characteristics. The tight-binding (TB) formalism is employed to obtain the band structure in k -space of ellipsoidal NWs to extract electron effective masses. The masses are transferred into quantum-corrected 3-D finite element (FE) drift-diffusion (DD) and ensemble Monte Carlo (MC) simulations, which accurately capture the quantum-mechanical confinement of the ellipsoidal NW cross sections. We demonstrate that the accurate parameterization of the bandstructure and the quantum-mechanical confinement has a profound impact on the computed ID – VG characteristics of nanoscaled devices. Finally, we devise a step-by-step technology computer-aided design (TCAD) methodology of simple parameterization for efficient DD device simulations. Journal Article IEEE Transactions on Electron Devices 69 9 5276 5282 Institute of Electrical and Electronics Engineers (IEEE) 0018-9383 1557-9646 Drift-diffusion (DD), Monte Carlo (MC), nanowire (NW), semiconductor device simulation, tight-binding (TB) 1 9 2022 2022-09-01 10.1109/ted.2022.3188945 COLLEGE NANME Electronic and Electrical Engineering COLLEGE CODE EEEG Swansea University The work of Natalia Seoane and Antonio García-Loureiro was supported by the Spain’s Ministerio de Ciencia e Innovación/Xunta de Galicia/ European Regional Development Fund, under Grant RYC-2017-23312, Grant PID2019-104834GB-I00, and Grant ED431F-2020/008. The work of Xavier Cartoixà was supported by the Spain’s Ministerio de Ciencia, Innovación y Universidades under Grant RTI2018-097876-B-C21 (MCIU/AEI/FEDER). 2022-10-31T20:27:21.9377130 2022-08-01T11:26:04.7158094 Faculty of Science and Engineering School of Aerospace, Civil, Electrical, General and Mechanical Engineering - Electronic and Electrical Engineering Natalia Seoane 0000-0003-0973-461x 1 Karol Kalna 0000-0002-6333-9189 2 Xavier Cartoixa 0000-0003-1905-5979 3 Antonio Garcia-Loureiro 0000-0003-0574-1513 4 60692__25031__9793a40eee8e471bb5004666af08a749.pdf 60692_VoR.pdf 2022-08-26T17:32:46.7924828 Output 1462407 application/pdf Version of Record true This work is licensed under a Creative Commons Attribution 4.0 License true eng https://creativecommons.org/licenses/by/4.0/
title Multilevel 3-D Device Simulation Approach Applied to Deeply Scaled Nanowire Field Effect Transistors
spellingShingle Multilevel 3-D Device Simulation Approach Applied to Deeply Scaled Nanowire Field Effect Transistors
Karol Kalna
title_short Multilevel 3-D Device Simulation Approach Applied to Deeply Scaled Nanowire Field Effect Transistors
title_full Multilevel 3-D Device Simulation Approach Applied to Deeply Scaled Nanowire Field Effect Transistors
title_fullStr Multilevel 3-D Device Simulation Approach Applied to Deeply Scaled Nanowire Field Effect Transistors
title_full_unstemmed Multilevel 3-D Device Simulation Approach Applied to Deeply Scaled Nanowire Field Effect Transistors
title_sort Multilevel 3-D Device Simulation Approach Applied to Deeply Scaled Nanowire Field Effect Transistors
author_id_str_mv 1329a42020e44fdd13de2f20d5143253
author_id_fullname_str_mv 1329a42020e44fdd13de2f20d5143253_***_Karol Kalna
author Karol Kalna
author2 Natalia Seoane
Karol Kalna
Xavier Cartoixa
Antonio Garcia-Loureiro
format Journal article
container_title IEEE Transactions on Electron Devices
container_volume 69
container_issue 9
container_start_page 5276
publishDate 2022
institution Swansea University
issn 0018-9383
1557-9646
doi_str_mv 10.1109/ted.2022.3188945
publisher Institute of Electrical and Electronics Engineers (IEEE)
college_str Faculty of Science and Engineering
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hierarchy_top_id facultyofscienceandengineering
hierarchy_top_title Faculty of Science and Engineering
hierarchy_parent_id facultyofscienceandengineering
hierarchy_parent_title Faculty of Science and Engineering
department_str School of Aerospace, Civil, Electrical, General and Mechanical Engineering - Electronic and Electrical Engineering{{{_:::_}}}Faculty of Science and Engineering{{{_:::_}}}School of Aerospace, Civil, Electrical, General and Mechanical Engineering - Electronic and Electrical Engineering
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description Three silicon nanowire (SiNW) field effect transistors (FETs) with 15 -, 12.5 -and 10.6 -nm gate lengths are simulated using hierarchical multilevel quantum and semiclassical models verified against experimental ID – VG characteristics. The tight-binding (TB) formalism is employed to obtain the band structure in k -space of ellipsoidal NWs to extract electron effective masses. The masses are transferred into quantum-corrected 3-D finite element (FE) drift-diffusion (DD) and ensemble Monte Carlo (MC) simulations, which accurately capture the quantum-mechanical confinement of the ellipsoidal NW cross sections. We demonstrate that the accurate parameterization of the bandstructure and the quantum-mechanical confinement has a profound impact on the computed ID – VG characteristics of nanoscaled devices. Finally, we devise a step-by-step technology computer-aided design (TCAD) methodology of simple parameterization for efficient DD device simulations.
published_date 2022-09-01T04:19:00Z
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score 11.013619

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