Simulation Study of Performance for a 20-nm Gate Length In0.53Ga0.47 As Implant Free Quantum Well MOSFET - Karol Kalna (IEEE Transactions on Nanotechnology, 2012)
The work summarises the final results of a three-year FP7 STREP project DUALOGIC (€ 9.1M). It combines state-of-the-art simulations including drift-diffusion approach, ensemble Monte Carlo technique, and Non-Equilibrium Green’s Function method with experiment to forecast the performance of a 20 nm gate length InGaAs channel nMOSFET for a future dual-logic CMOS technology. It gives vision and guidance to semiconductor industry in the R&D for digital application how to achieve improvement in performance, functionality and density.